Semiconductor device

  • Inventors: NISHINO YOICHI
  • Assignees: Sony Corp
  • Publication Date: December 26, 1991
  • Publication Number: JP-H03295268-A


PURPOSE: To protect a semiconductor device against the effect of potential fluctuation by a method wherein a dedicated voltage wire is provided for a well separately from a voltage wire used for supplying a prescribed voltage to a transistor. CONSTITUTION: An N-type well region 22 is formed on the surface of a P-type silicon substrate 21 (or a P-type well region). For instance, a part of the flip- flops in a serial access memory is formed in the N-type well region 22. An N + -type diffusion region 23 is formed on the surface of the N-type well region 22. The N + -type diffusion region 23 serves as a region which comes into contact with a power wire 24 to supply an electric power to the well region 22, and the power wire 24 dedicated to a well is connected to the N + -type diffusion region 23. One or more of the N + -type diffusion region 23 are provided to the surface of the well region 22 depending on the size of a well. The well-dedicated power wire 24 is not used for supplying another power voltage Vcc. A normal power wire 25 is also provided in parallel with it separately from the well- dedicated power wire 24. COPYRIGHT: (C)1991,JPO&Japio




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Cited By (3)

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    JP-2014123632-AJuly 03, 2014Seiko Instruments Inc, セイコーインスツル株式会社半導体装置
    US-5504361-AApril 02, 1996Deutsche Itt Industries GmbhPolarity-reversal protection for integrated electronic circuits in CMOS technology
    US-5629545-AMay 13, 1997Texas Instruments IncorporatedElectrostatic discharge protection in integrated circuits, systems and methods